The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2024

Filed:

Jan. 10, 2023
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Hao T. Nguyen, San Jose, CA (US);

Tomoko Ogura Iwasaki, San Jose, CA (US);

Erwin E. Yu, San Jose, CA (US);

Dheeraj Srinivasan, San Jose, CA (US);

Sheyang Ning, San Jose, CA (US);

Lawrence Celso Miranda, San Jose, CA (US);

Aaron S. Yip, Los Gatos, CA (US);

Yoshihiko Kamata, Yokohama, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 11/56 (2006.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/3459 (2013.01); G11C 11/5621 (2013.01); G11C 11/5671 (2013.01);
Abstract

Memory devices might include a first storage element, a second storage element, a data line, and a controller. The first storage element is to store a first data bit. The second storage element is to store a second data bit. The data line is selectively connected to the first storage element, the second storage element, and a memory cell. The controller is configured to apply one of four voltage levels to the data line based on the first data bit and the second data bit.


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