The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Nov. 15, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yu-Chien Ku, Tainan, TW;

Huai-Jen Tung, Tainan, TW;

Keng-Ying Liao, Tainan, TW;

Yi-Hung Chen, Kaohsiung, TW;

Shih-Hsun Hsu, New Taipei, TW;

Yi-Fang Yang, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 23/52 (2006.01); H01L 23/48 (2006.01); H01L 27/146 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14636 (2013.01); H01L 24/05 (2013.01); H01L 27/14643 (2013.01); H01L 2224/0214 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/03831 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05559 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/05578 (2013.01);
Abstract

A semiconductor device includes a substrate, a dielectric layer, a plurality of dielectric patterns and a conductive pad. The substrate includes a first surface and a second surface opposite to the first surface. The dielectric layer is disposed at the first surface of the substrate, and the substrate is disposed between the dielectric layer and the second surface of the substrate. The dielectric patterns are disposed on the dielectric layer and between the first surface and the second surface of the substrate. The conductive pad is inserted between the plurality of dielectric patterns and extended into the dielectric layer.


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