The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2024

Filed:

Sep. 25, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bin Liu, Shanghai, CN;

John G. Meyers, Sacramento, CA (US);

Florence R. Pon, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/13 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01); H01L 25/10 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49816 (2013.01); H01L 23/13 (2013.01); H01L 23/5386 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01);
Abstract

A packaged device () includes a substrate () and one or more contacts () disposed on a side of the substrate (). Structures of the packaged device () define at least in part a recess region () that extends from the side of the substrate () and through the substrate (), where one or more contacts () of a second hardware interface are disposed in the recess region (). The one or more contacts () of the first hardware interface enable connection of the packaged device () to a printed circuit board. The one or more contacts () of the second hardware interface enable connection between one or more IC dies of the packaged device () and another IC die () that is a component of the packaged device () or of a different packaged device.


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