The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 06, 2024

Filed:

Nov. 16, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Aleksandar Aleksov, Chandler, AZ (US);

Telesphor Kamgaing, Chandler, AZ (US);

Sri Ranga Sai Boyapati, Chandler, AZ (US);

Kristof Darmawikarta, Chandler, AZ (US);

Eyal Fayneh, Givatayim, IL;

Ofir Degani, Haifa, IL;

David Levy, Haifa, IL;

Johanna M. Swan, Scottsdale, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 21/4857 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 24/16 (2013.01); H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H01L 25/50 (2013.01); H01L 24/17 (2013.01); H01L 2223/6627 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/1703 (2013.01); H01L 2224/17181 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06568 (2013.01); H01L 2924/19033 (2013.01);
Abstract

In-package radio frequency (RF) waveguides as high bandwidth chip-to-chip interconnects and methods for using the same are disclosed. In one example, an electronic package includes a package substrate, first and second silicon dies or tiles, and an RF waveguide. The first and second silicon dies or tiles are attached to the package substrate. The RF waveguide is formed in the package substrate and interconnects the first silicon die or tile with the second silicon die or tile.


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