The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2024

Filed:

Jul. 22, 2021
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Francisco Javier Santos Rodriguez, Villach, AT;

Günter Denifl, Annenheim, AT;

Tobias Hoechbauer, Villach, AT;

Martin Huber, Villach, AT;

Wolfgang Lehnert, Lintach, DE;

Roland Rupp, Lauf, DE;

Hans-Joachim Schulze, Taufkirchen, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/02 (2006.01); H01L 21/18 (2006.01);
U.S. Cl.
CPC ...
H01L 21/7813 (2013.01); H01L 21/02016 (2013.01); H01L 21/185 (2013.01); H01L 21/7806 (2013.01);
Abstract

A method for processing a wide band gap semiconductor wafer includes: depositing a support layer including semiconductor material at a back side of a wide band gap semiconductor wafer, the wide band gap semiconductor wafer having a band gap larger than the band gap of silicon; depositing an epitaxial layer at a front side of the wide band gap semiconductor wafer; and splitting the wide band gap semiconductor wafer along a splitting region to obtain a device wafer comprising at least a part of the epitaxial layer, and a remaining wafer comprising the support layer.


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