The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Jan. 04, 2022
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Xuezhun Xie, Wuhan, CN;

Yali Song, Wuhan, CN;

Lei Jin, Wuhan, CN;

Xiangnan Zhao, Wuhan, CN;

Yuanyuan Min, Wuhan, CN;

Jianquan Jia, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); H10B 41/27 (2023.01); G11C 5/02 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H10B 41/27 (2023.02); G11C 5/025 (2013.01); G11C 16/0483 (2013.01); G11C 16/3436 (2013.01); H10B 43/27 (2023.02);
Abstract

The present disclosure relates to a three-dimensional memory (3D) and a control method thereof. The 3D memory includes a first deck and a second deck which are stacked in a vertical direction of a substrate. The first deck and the second deck each includes a plurality of memory string. Each memory string includes a plurality of memory cells. The plurality of memory cells includes a first portion and a second portion. A diameter of channel structure corresponding to the first portion of memory cells is smaller than that of channel structure corresponding to the second portion of memory cells. The method includes performing a read operation for selected memory cells that are in at least one of the first deck or the second deck; and applying a pass voltage to non-selected memory cells other than the selected memory cells in the first deck and the second deck. A first pass voltage is lower than a second pass voltage. The first pass voltage is applied to first non-selected memory cells in the first portion, and the second pass voltage is applied to second non-selected memory cells in the second portion.


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