The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2024

Filed:

Aug. 31, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Karthik Sarpatwari, Boise, ID (US);

Fabio Pellizzer, Boise, ID (US);

Nevil N. Gajera, Boise, ID (US);

Yen Chun Lee, Boise, ID (US);

Ferdinando Bedeschi, Biassono, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/4074 (2006.01); G11C 7/10 (2006.01); G11C 11/4096 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4074 (2013.01); G11C 7/1063 (2013.01); G11C 7/1069 (2013.01); G11C 11/4096 (2013.01);
Abstract

Methods and systems include memory devices with a memory array comprising a plurality of memory cells. The memory devices include a control circuit operatively coupled to the memory array and configured to receive a read request for data and to apply a plurality of read voltages to the memory array based on the read request. The control circuit is further configured to perform a data analysis for a first set of data read based on the application of the plurality of read voltages and to derive a demarcation bias voltage (VDM) based on the data analysis. The control circuit is also configured to apply the VDM to the memory array to read a second set of data.


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