The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2023
Filed:
Jul. 29, 2021
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Kai-Ming Chiang, Hsinchu, TW;
Chao-wei Li, Hsinchu, TW;
Wei-Lun Tsai, Hsinchu, TW;
Chia-Min Lin, Hsinchu, TW;
Yi-Da Tsai, Chiayi Country, TW;
Sheng-Feng Weng, Taichung, TW;
Yu-Hao Chen, HsinChu, TW;
Sheng-Hsiang Chiu, Tainan, TW;
Chih-Wei Lin, Hsinchu County, TW;
Ching-Hua Hsieh, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.