The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

Feb. 19, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Weston Bertrand, Tempe, AZ (US);

Kyle Arrington, Gilbert, AZ (US);

Shankar Devasenathipathy, Tempe, AZ (US);

Aaron McCann, Queen Creek, AZ (US);

Nicholas Neal, Gilbert, AZ (US);

Zhimin Wan, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/433 (2006.01); H01L 25/065 (2023.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 23/433 (2013.01); H01L 23/3675 (2013.01); H01L 25/0657 (2013.01);
Abstract

Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.


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