The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2023

Filed:

May. 12, 2020
Applicant:

Zhuhai Access Semiconductor Co., Ltd., Guangdong, CN;

Inventors:

Xianming Chen, Guangdong, CN;

Jindong Feng, Guangdong, CN;

Benxia Huang, Guangdong, CN;

Lei Feng, Guangdong, CN;

Wenshi Wang, Guangdong, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/04 (2006.01); H01L 23/29 (2006.01); H01L 23/36 (2006.01); H01L 23/48 (2006.01); H01L 23/485 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3107 (2013.01); H01L 21/561 (2013.01); H01L 21/568 (2013.01); H01L 23/041 (2013.01); H01L 23/293 (2013.01); H01L 23/36 (2013.01); H01L 23/481 (2013.01); H01L 23/485 (2013.01); H01L 24/96 (2013.01);
Abstract

An embedded chip package according to an embodiment of the present application may include at least one chip and a frame surrounding the at least one chip, the chip having a terminal face and a back face separated by a height of the chip, the frame having a height equal to or larger than the height of the chip, wherein the gap between the chip and the frame is fully filled with a photosensitive polymer dielectric, the terminal face of the chip being coplanar with the frame, a first wiring layer being formed on the terminal face of the chip and a second wiring layer being formed on the back face of the chip.


Find Patent Forward Citations

Loading…