The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2023

Filed:

Aug. 23, 2021
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Li-Yen Liang, Kaohsiung, TW;

Teng-Hao Yeh, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 43/35 (2023.01); H10B 43/10 (2023.01); H10B 43/40 (2023.01); H01L 23/522 (2006.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
H10B 43/35 (2023.02); H01L 23/5226 (2013.01); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02);
Abstract

A 3D flash memory device such as a 3D AND flash memory device is provided. The 3D flash memory device includes a substrate, a conductive layer, a 3D flash memory array, and through-array vias (TAVs). The substrate includes a memory cell region and a passive device region. The conductive layer is formed on the substrate, and the conductive layer includes: a first circuit disposed at the memory cell region and a second circuit of a passive device disposed at the passive device region. The 3D flash memory array is formed on the first circuit of the memory cell region. The TAVs are respectively formed on the second circuit of the passive device disposed at the passive device region and connected to at least one end of the second circuit.


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