The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2023

Filed:

Apr. 08, 2022
Applicants:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Tsmc China Company Limited, Shanghai, CN;

Inventor:

Zheng-Long Chen, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/40 (2006.01); H01L 21/265 (2006.01); H01L 21/266 (2006.01); H01L 21/324 (2006.01); H01L 21/225 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7816 (2013.01); H01L 21/2253 (2013.01); H01L 21/266 (2013.01); H01L 21/26513 (2013.01); H01L 21/324 (2013.01); H01L 29/063 (2013.01); H01L 29/1095 (2013.01); H01L 29/408 (2013.01); H01L 29/66681 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, a deep n-well, a field oxide, a gate structure, a p-type doped region, a source region, and a drain region. The deep n-well is in the semiconductor substrate. The field oxide is partially embedded in the deep n-well and having a tip corner in a position substantially level with a top surface of the semiconductor substrate. The gate structure is on the field oxide and laterally extends past the tip corner of the field oxide. The p-type doped region is in the deep n-well and is interfaced with the tip corner of the field oxide. The source region and a drain region are laterally separated at least in part by the p-type doped region and the field oxide.


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