The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2023
Filed:
May. 28, 2021
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Kuiwon Kang, San Diego, CA (US);
Hong Bok We, San Diego, CA (US);
Chin-Kwan Kim, San Diego, CA (US);
Milind Shah, San Diego, CA (US);
Assignee:
QUALCOMM INCORPORATED, San Diego, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 23/49822 (2013.01); H01L 24/16 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/16238 (2013.01);
Abstract
A package comprising a substrate and an integrated device coupled to the substrate. The substrate includes at least one dielectric layer, a plurality of interconnects comprising a plurality of protruding pad interconnects, and a solder resist layer located over the at least one dielectric layer, the solder resist layer comprising a thickness that is greater than a thickness of the plurality of protruding pad interconnects. A protruding pad interconnect may include a first pad portion and a second pad portion.