The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2023
Filed:
Aug. 03, 2021
Tokyo Electron Limited, Tokyo, JP;
Jeffrey Smith, Clifton Park, NY (US);
Daniel Chanemougame, Niskayuna, NY (US);
Lars Liebmann, Mechanicsville, NY (US);
Paul Gutwin, Albany, NY (US);
Robert Clark, Livermore, CA (US);
Anton Devilliers, Clifton Park, NY (US);
Tokyo Electron Limited, Tokyo, JP;
Abstract
Techniques herein include methods for fabricating CFET devices. The methods enable high-temperature processes to be performed for FINFET and gate all around (GAA) technologies without degradation of temperature sensitive materials within the device and transistors. In particular, high temperature anneals and depositions can be performed prior to deposition of temperature-sensitive materials, such as work function metals and silicides. The methods enable at least two transistor devices to be fabricated in a stepwise manner while preventing thermal violations of any materials in either transistor.