The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

May. 23, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yu-San Chien, Hsinchu, TW;

Chun-Sheng Liang, Changhua County, TW;

Jhon-Jhy Liaw, Hsinchu County, TW;

Kuo-Hua Pan, Hsinchu, TW;

Hsin-Che Chiang, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01);
Abstract

Provided is a semiconductor device including a substrate, one hybrid fin, a gate, and a dielectric structure. The substrate includes at least two fins. The hybrid fin is disposed between the at least two fins. The gate covers portions of the at least two fins and the hybrid fin. The dielectric structure lands on the hybrid fin to divide the gate into two segment. The two segments are electrically isolated to each other by the dielectric structure and the hybrid fin. The hybrid fin includes a first portion, disposed between the two segments of the gate; and a second portion, disposed aside the first portion, wherein a top surface of the second portion is lower than a top surface of the first portion.


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