The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 05, 2023

Filed:

Feb. 06, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Te-Chih Hsiung, Taipei, TW;

Yi-Chun Chang, Hsinchu, TW;

Yi-Chen Wang, Hsinchu County, TW;

Yuan-Tien Tu, Chiayi County, TW;

Huan-Just Lin, Hsinchu, TW;

Jyun-De Wu, New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/417 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/41791 (2013.01); H01L 21/76802 (2013.01); H01L 21/76826 (2013.01); H01L 21/76877 (2013.01); H01L 21/823475 (2013.01); H01L 23/5226 (2013.01); H01L 29/42392 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/78696 (2013.01); H01L 2029/7858 (2013.01);
Abstract

A method comprises forming a source/drain contact over a source/drain region; forming an etch stop layer over the source/drain contact and an interlayer dielectric (ILD) layer over the etch stop layer; performing a first etching process to form a via opening extending through the ILD layer and a recess in the etch stop layer; oxidizing a sidewall of the recess in the etch stop layer; after oxidizing the sidewall of the recess in the etch stop layer, performing a second etching process to extend the via opening down to the source/drain contact; and after performing the second etching process, forming a source/drain via in the via opening.


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