The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 22, 2023

Filed:

May. 27, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Akihiro Horibe, Yokohama, JP;

Takahito Watanabe, Yokohama, JP;

Toyohiro Aoki, Yokohama, JP;

Takashi Hisada, Hachiouji, JP;

Hiroyuki Mori, Yasu, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 23/538 (2013.01); H01L 24/75 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 24/92 (2013.01); H01L 2224/75101 (2013.01); H01L 2224/75755 (2013.01); H01L 2224/75981 (2013.01); H01L 2224/81054 (2013.01); H01L 2224/81136 (2013.01); H01L 2224/83951 (2013.01); H01L 2224/92125 (2013.01);
Abstract

Interconnecting a first chip and a second chip by a bridge member includes a chip handler for handling the first chip and the second chip. Each of the first chip and the second chip has a first surface including a first set of terminals and a second surface opposite to the first surface. The chip handler has an opening and at least one support surface for supporting the first surfaces of the first chip and the second chip when the first chip and the second chip are mounted to the chip handler. A chip support member supports the first chip and the second chip from the second surfaces, and a bridge handler is provided for inserting the bridge member through the opening of the chip handler and for placing the bridge member onto the first sets of terminals of the first chip and the second chip.


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