The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 08, 2023

Filed:

Oct. 20, 2020
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chi-Ming Chen, Zhubei, TW;

Po-Chun Liu, Hsinchu, TW;

Chung-Yi Yu, Hsinchu, TW;

Chia-Shiung Tsai, Hsinchu, TW;

Ru-Liang Lee, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/265 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 21/0251 (2013.01); H01L 21/0254 (2013.01); H01L 21/0262 (2013.01); H01L 21/02458 (2013.01); H01L 21/02579 (2013.01); H01L 29/2003 (2013.01); H01L 29/66462 (2013.01); H01L 21/26546 (2013.01);
Abstract

A semiconductor device includes a doped substrate and a seed layer in direct contact with the substrate. The seed layer includes a first seed sublayer having a first lattice structure. The first seed layer is doped with carbon. The seed layer further includes a second seed sublayer over the first see layer, wherein the second seed layer has a second lattice structure. The semiconductor device further includes a graded layer in direct contact with the seed layer. The graded layer includes a first graded sublayer including AlGaN having a first Al:Ga ratio; a second graded sublayer including AlGaN having a second Al:Ga ratio different from the first Al:Ga ratio; and a third graded sublayer over including AlGaN having a third Al:Ga ratio different from the second Al:Ga ratio. The semiconductor device includes a channel layer over the graded layer. The semiconductor device includes an active layer over the channel layer.


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