Method for forming contact structures in three-dimensional memory devices

Abstract

Embodiments of 3D memory structures and methods for forming the same are disclosed. The fabrication method includes forming multiple openings in staircase regions, periphery device regions, and substrate contact regions of a 3D NAND memory device. The openings can be formed by a photolithography process followed by multiple etching processes. The openings can include complete openings that expose the underlying layer and mid-way openings where a remaining portion of the photoresist still exists between the opening and the underlying layer. The remaining portion of the photoresist can delay the etching process in the shorter openings for the upper level staircase structure during the formation of the deeper openings for the lower level staircase structure. Conductive material is deposited into the openings to form contact structures for structures such as substrate contact pads, upper and lower level staircase structures, and/or peripheral devices.