The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 25, 2023

Filed:

Oct. 11, 2018
Applicant:

Shenzhen Xiuyi Investment Development Partnership (Limited Partnership), Shenzhen, CN;

Inventors:

Chuan Hu, Shenzhen, CN;

Yingqiang Yan, Shenzhen, CN;

Yuejin Guo, Shenzhen, CN;

Yingjun Pi, Shenzhen, CN;

Junjun Liu, Shenzhen, CN;

Edward Prack, Shenzhen, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/56 (2013.01); H01L 23/29 (2013.01); H01L 23/3107 (2013.01); H01L 24/92 (2013.01); H01L 2224/92144 (2013.01);
Abstract

A fan-out packaging method includes: prepare circuit patterns on one side or both sides of a substrate; install electronic parts on one side or both sides of the substrate; prepare packaging layers on both sides of the substrate; the packaging layers on both sides of the substrate package the substrate, the circuit patterns, and the electronic parts, the packaging layers being made of a thermal-plastic material; wherein the substrate is provided with a via hole; both sides of the substrate are communicated by means of the via hole; a part of the packaging layers penetrate through the via hole when the packaging layers are prepared on both sides of the substrate; and the packaging layers on both sides of the substrate are connected by means of the via hole.


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