The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 11, 2023

Filed:

Apr. 10, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Che-Cheng Chang, New Taipei, TW;

Chih-Han Lin, Hsinchu, TW;

Horng-Huei Tseng, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/8238 (2006.01); H01L 29/78 (2006.01); H01L 27/092 (2006.01); H01L 29/16 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 27/12 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0886 (2013.01); H01L 21/0223 (2013.01); H01L 21/02255 (2013.01); H01L 21/76224 (2013.01); H01L 21/823431 (2013.01); H01L 21/823462 (2013.01); H01L 21/823481 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823857 (2013.01); H01L 27/0924 (2013.01); H01L 29/0649 (2013.01); H01L 29/16 (2013.01); H01L 29/42376 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7851 (2013.01); H01L 29/7855 (2013.01); H01L 21/845 (2013.01); H01L 27/1211 (2013.01); H01L 2029/7858 (2013.01);
Abstract

A substrate is patterned to form trenches and a semiconductor fin between the trenches. Insulators are formed in the trenches and a first dielectric layer is formed to cover the semiconductor fin and the insulators. A dummy gate strip is formed on the first dielectric layer. Spacers are formed on sidewalls of the dummy gate strip. The dummy gate strip and the first dielectric layer underneath are removed until sidewalls of the spacers, a portion of the semiconductor fin and portions of the insulators are exposed. A second dielectric layer is selectively formed to cover the exposed portion of the semiconductor fin, wherein a thickness of the first dielectric layer is smaller than a thickness of the second dielectric layer. A gate is formed between the spacers to cover the second dielectric layer, the sidewalls of the spacers and the exposed portions of the insulators.


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