The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2023

Filed:

Feb. 01, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Wei-Cheng Lin, Taichung, TW;

Cheng-Chi Chuang, New Taipei, TW;

Chih-Liang Chen, Hsinchu, TW;

Charles Chew-Yuen Young, Cupertino, CA (US);

Hui-Ting Yang, Zhubei, TW;

Wayne Lai, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/535 (2006.01); H01L 21/768 (2006.01); H01L 27/02 (2006.01); H01L 27/088 (2006.01); H01L 27/118 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 23/535 (2013.01); H01L 21/76895 (2013.01); H01L 27/0207 (2013.01); H01L 27/0886 (2013.01); H01L 27/11807 (2013.01); H01L 29/785 (2013.01); H01L 2027/11875 (2013.01); H01L 2027/11881 (2013.01);
Abstract

The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to forming via rail and deep via structures to reduce parasitic capacitances in standard cell structures. Via rail structures are formed in a level different from the conductive lines. The via rail structure can reduce the number of conductive lines and provide larger separations between conductive lines that are on the same interconnect level and thus reduce parasitic capacitance between conductive lines.


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