The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2023

Filed:

Nov. 30, 2021
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Shan Li, Wuhan, CN;

Kaikai You, Wuhan, CN;

Ying Cui, Wuhan, CN;

Jianquan Jia, Wuhan, CN;

Kaiwei Li, Wuhan, CN;

An Zhang, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/14 (2006.01); G11C 8/08 (2006.01); G11C 7/14 (2006.01); G11C 11/4074 (2006.01); G11C 11/4094 (2006.01); G11C 16/04 (2006.01); G11C 16/06 (2006.01); G11C 16/10 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
G11C 8/08 (2013.01); G11C 7/14 (2013.01); G11C 8/14 (2013.01); G11C 11/4074 (2013.01); G11C 11/4094 (2013.01); G11C 16/0425 (2013.01); G11C 16/0466 (2013.01); G11C 16/0483 (2013.01); G11C 16/06 (2013.01); G11C 16/10 (2013.01); G11C 16/30 (2013.01);
Abstract

A memory device includes bit lines, and a cell array including strings, each of which includes memory cells, a select cell coupled to a respective one of the bit lines, and a dummy cell between the select cell and the memory cells. The memory device also includes a select line coupled to the select cells, a dummy word line coupled to the dummy cells, word lines each coupled to a respective row of the memory cells, and a controller coupled to the cell array. The controller is configured to drive a voltage on the dummy word line from a first level to a second level lower than the first level. The controller is also configured to drive a voltage on the select line from the first level to the second level, such that the voltage on the select line reaches the second level after the voltage on the dummy word line reaches the second level. The controller is further configured to, after the voltage on the select line reaches the second level, drive a voltage on a selected word line of the word lines from the second level to a third level higher than the first level to program the memory cells coupled to the selected word line.


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