The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Feb. 15, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Brandon P. Wirz, Boise, ID (US);

Benjamin L. McClain, Boise, ID (US);

Jeremy E. Minnich, Boise, ID (US);

Zhaohui Ma, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 21/033 (2006.01); H01L 21/60 (2006.01);
U.S. Cl.
CPC ...
H01L 24/17 (2013.01); H01L 21/0337 (2013.01); H01L 24/14 (2013.01); H01L 24/81 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2021/60007 (2013.01); H01L 2224/13101 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81024 (2013.01); H01L 2224/81141 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/92125 (2013.01);
Abstract

A semiconductor device assembly that includes a semiconductor device positioned over a substrate with a number of electrical interconnections formed between the semiconductor device and the substrate. The surface of the substrate includes a plurality of discrete solder mask standoffs that extend towards the semiconductor device. A thermal compression bonding process is used to melt solder to form the electrical interconnects, which lowers the semiconductor device to contact and be supported by the plurality of discrete solder mask standoffs. The solder mask standoffs permit the application of a higher pressure during the bonding process than using traditional solder masks. The solder mask standoffs may have various polygonal or non-polygonal shapes and may be positioned in pattern to protect sensitive areas of the semiconductor device and/or the substrate. The solder mask standoffs may be an elongated shape that protects areas of the semiconductor device and/or substrate.


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