The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2023

Filed:

Dec. 21, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Meng-Sheng Chang, Hsinchu, TW;

Yoshitaka Yamauchi, Hsinchu, TW;

Perng-Fei Yuh, Walnut Creek, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/18 (2006.01); H03K 19/20 (2006.01); G11C 17/16 (2006.01);
U.S. Cl.
CPC ...
G11C 17/18 (2013.01); G11C 17/16 (2013.01); H03K 19/20 (2013.01);
Abstract

Systems, devices, and methods are described herein for a programmable memory array. A programmable memory system includes an array of programmable memory bit cells. A memory bit cell of the array includes a first transistor of a first type controlled by a bit line, a second transistor of a second type responsive to a first word line and a second word line via a logic gate, and a third transistor of the second type responsive to the word line. The first word line is positioned substantially perpendicular to the bit line, and the second word line is positioned substantially parallel to the bit line. The first word line is activated via an X portion of an address. While the second word line is activated via a Y portion of the address.


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