The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2023
Filed:
Jun. 27, 2019
Intel Corporation, Santa Clara, CA (US);
Eng Huat Goh, Ayer Itam, MY;
Jiun Hann Sir, Gelugor, MY;
Khang Choong Yong, Puchong, MY;
Boon Ping Koh, Seberang Jaya, MY;
Wil Choon Song, Bayan Lepas, MY;
Min Suet Lim, Gulugor, MY;
Intel Corporation, Santa Clara, CA (US);
Abstract
Embodiments include semiconductor packages and method of forming the semiconductor packages. A semiconductor package includes a package substrate on a substrate, a die on the package substrate, and a conductive stiffener over the package substrate and the substrate. The conductive stiffener surrounds the package substrate, where the conductive stiffener has a top portion and a plurality of sidewalls, and where the top portion is directly disposed on the package substrate, and the sidewalls are vertically disposed on the substrate. The semiconductor package also includes the substrate that has a plurality of conductive pads, where the conductive pads are conductively coupled to a ground source. The conductive stiffener may conductively couple the package substrate to the conductive pads of the substrate. The top portion may have a cavity that surrounds the die, where the top portion is directly disposed on a plurality of outer edges of the package substrate.