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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11637103 B1

PDFFull Text
Date of Patent:
Apr. 25, 2023

Filed:

Oct. 04, 2021

Semiconductor device

Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Yen-Wei Tung, Tainan, TW;

Jen-Yu Wang, Tainan, TW;

Cheng-Tung Huang, Kaohsiung, TW;

Yan-Jou Chen, Yunlin County, TW;

Assignee:

UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;

Attorney:

Winston Hsu

Primary Examiner:

Erik Kielin

Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 27/02 (2006.01); H01L 29/78 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 29/423 (2006.01); H01L 29/165 (2006.01); H01L 21/8238 (2006.01); H01L 21/3213 (2006.01); H01L 21/762 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/0217 (2013.01); H01L 21/32139 (2013.01); H01L 21/76224 (2013.01); H01L 21/823821 (2013.01); H01L 21/823842 (2013.01); H01L 21/823878 (2013.01); H01L 27/0207 (2013.01); H01L 27/0922 (2013.01); H01L 29/0649 (2013.01); H01L 29/66545 (2013.01); H01L 29/7848 (2013.01); H01L 29/165 (2013.01); H01L 29/42364 (2013.01); H01L 29/42376 (2013.01); H01L 29/4916 (2013.01); H01L 29/4966 (2013.01); H01L 29/517 (2013.01); H01L 29/518 (2013.01);
Abstract

A semiconductor device includes a PMOS region and a NMOS region on a substrate, a first fin-shaped structure on the PMOS region, a first single diffusion break (SDB) structure in the first fin-shaped structure, a first gate structure on the first SDB structure, and a second gate structure on the first fin-shaped structure. Preferably, the first gate structure and the second gate structure are of different materials and the first gate structure disposed directly on top of the first SDB structure is a polysilicon gate while the second gate structure disposed on the first fin-shaped structure is a metal gate in the PMOS region.

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