The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2023

Filed:

May. 25, 2021
Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Shimpei Yamaguchi, Tokyo, JP;

Atsushi Tsuboi, Tokyo, JP;

Atsushi Endo, Nirasaki, JP;

Masaru Sugimoto, Hillsboro, OR (US);

Hiroshi Yano, Tokyo, JP;

Yasushi Kodashima, Nirasaki, JP;

Masanobu Igeta, Hillsboro, OR (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0665 (2013.01); H01L 21/0259 (2013.01); H01L 29/0607 (2013.01); H01L 29/66477 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes forming a support on a side surface of a stack that extends from a substrate. The stack includes a second sacrificial film, plural first sacrificial films and plural silicon (Si)-containing films, wherein one first sacrificial film of the plural sacrificial films is stacked upon the second sacrificial film and the plural sacrificial films and the plural Si-containing films are alternately stacked upon one another, and at least a side of the second sacrificial film is not covered by the support, the one first sacrificial film and the substrate. The method further includes removing the second sacrificial film from the stack to form a space between the substrate and the one first sacrificial film and adjacent to the support, and filling the space with a dielectric film.


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