IDiyas

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11569437 B1

PDFFull Text
Date of Patent:
Jan. 31, 2023

Filed:

Apr. 22, 2020

Memory device comprising a top via electrode and methods of making such a memory device

Applicant:

Globalfoundries U.s. Inc., Santa Clara, CA (US);

Inventors:

Yanping Shen, Saratoga Springs, NY (US);

Halting Wang, Clifton Park, NY (US);

Sipeng Gu, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES U.S. Inc., Santa Clara, CA (US);

Attorneys:

Anthony Canale

Hoffman Warnick LLC

Primary Examiner:

Amar Movva

Int. Cl.
CPC ...
H01L 43/02 (2006.01); H01L 27/24 (2006.01); H01L 27/22 (2006.01); H01L 27/1159 (2017.01); H01L 43/08 (2006.01); H01L 45/00 (2006.01); H01L 43/12 (2006.01); H01L 43/10 (2006.01);
U.S. Cl.
CPC ...
H01L 43/02 (2013.01); H01L 27/1159 (2013.01); H01L 27/222 (2013.01); H01L 27/24 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 43/12 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/14 (2013.01); H01L 45/16 (2013.01);
Abstract

An illustrative device disclosed herein includes at least one layer of insulating material, a conductive contact structure having a conductive line portion and a conductive via portion and a memory cell positioned in a first opening in the at least one layer of insulating material. In this illustrative example, the memory cell includes a bottom electrode, a memory state material positioned above the bottom electrode and an internal sidewall spacer positioned within the first opening and above at least a portion of the memory state material, wherein the internal sidewall spacer defines a spacer opening and wherein the conductive via portion is positioned within the spacer opening and above a portion of the memory state material.

Find Patent Forward Citations

Loading…