The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2023
Filed:
Dec. 27, 2017
Intel Corporation, Santa Clara, CA (US);
Cheng-Ying Huang, Hillsboro, OR (US);
Willy Rachmady, Beaverton, OR (US);
Gilbert Dewey, Hillsboro, OR (US);
Erica J. Thompson, Beaverton, OR (US);
Aaron D. Lilak, Beaverton, OR (US);
Jack T. Kavalieros, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Disclosed are etchstop regions in fins of semiconductor devices, and related methods. A semiconductor device includes a buried region, a fin on the buried region, and a gate formed at least partially around the fin. At least a portion of the fin that borders the buried region includes an etchstop material. The etchstop material includes a doped semiconductor material that has a slower etch rate than that of an intrinsic form of the semiconductor material. A method of manufacturing a semiconductor device includes forming a gate on a fin, implanting part of the fin with dopants configured to decrease an etch rate of the part of the fin, removing at least part of the fin, and forming an epitaxial semiconductor material on a remaining proximal portion of the fin.