The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2023

Filed:

Mar. 08, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Guangjun Yang, Meridian, ID (US);

Vinay Nair, Boise, ID (US);

Devesh Dadhich Shreeram, Boise, ID (US);

Ashwin Panday, Boise, ID (US);

Kangle Li, Boise, ID (US);

Zhiqiang Xie, Meridian, ID (US);

Silvia Borsari, Boise, ID (US);

Mohd Kamran Akhtar, Boise, ID (US);

Si-Woo Lee, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10814 (2013.01); H01L 27/10823 (2013.01); H01L 27/10855 (2013.01);
Abstract

Some embodiments include an integrated assembly having digit-line-contact-regions between pairs of capacitor-contact-regions. The capacitor-contact-regions are arranged with six adjacent capacitor-contact-regions in a substantially rectangular configuration. Conductive plugs are coupled with the capacitor-contact-regions. Conductive redistribution material is coupled with the conductive plugs. Upper surfaces of the conductive redistribution material are arranged in a substantially hexagonal-close-packed configuration. Digit lines are over the digit-line-contact-regions. Insulative regions are between the digit lines and the conductive plugs. The insulative regions contain voids and/or low-k dielectric material. Capacitors are coupled with the upper surfaces of the conductive redistribution material.


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