The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2023

Filed:

Nov. 28, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Lauren Ashley Link, Mesa, AZ (US);

Andrew James Brown, Phoenix, AZ (US);

Prithwish Chatterjee, Tempe, AZ (US);

Sai Vadlamani, Chandler, AZ (US);

Ying Wang, Chandler, AZ (US);

Chong Zhang, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/64 (2006.01); H01L 23/15 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 23/15 (2013.01); H01L 23/645 (2013.01);
Abstract

Disclosed herein are asymmetric cored integrated circuit (IC) package supports, and related devices and methods. For example, in some embodiments, an IC package support may include a core region having a first face and an opposing second face, a first buildup region at the first face of the core region, and a second buildup region at the second face of the core region. A thickness of the first buildup region may be different than a thickness of the second buildup region. In some embodiments, an inductor may be included in the core region.


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