The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Mar. 01, 2021
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Yu-Hung Cheng, Tainan, TW;

Shyh-Fann Ting, Tainan, TW;

Yen-Ting Chiang, Tainan, TW;

Yeur-Luen Tu, Taichung, TW;

Min-Ying Tsai, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H04N 5/365 (2011.01); H01L 21/762 (2006.01); H01L 31/0216 (2014.01);
U.S. Cl.
CPC ...
H01L 27/1463 (2013.01); H01L 27/1464 (2013.01); H01L 27/1469 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 27/14645 (2013.01); H01L 27/14612 (2013.01); H01L 27/14621 (2013.01); H01L 27/14627 (2013.01); H01L 27/14685 (2013.01);
Abstract

In some embodiments, a method is provided. The method includes forming a plurality of trenches in a semiconductor substrate, where the trenches extend into the semiconductor substrate from a back-side of the semiconductor substrate. An epitaxial layer comprising a dopant is formed on lower surfaces of the trenches, sidewalls of the trenches, and the back-side of the semiconductor substrate, where the dopant has a first doping type. The dopant is driven into the semiconductor substrate to form a first doped region having the first doping type along the epitaxial layer, where the first doped region separates a second doped region having a second doping type opposite the first doping type from the sidewalls of the trenches and from the back-side of the semiconductor substrate. A dielectric layer is formed over the back-side of the semiconductor substrate, where the dielectric layer fill the trenches to form back-side deep trench isolation structures.


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