The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2023

Filed:

Aug. 19, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Yung-Lung Lin, Taichung, TW;

Cheng-Hsien Chou, Tainan, TW;

Cheng-Yuan Tsai, Chu-Pei, TW;

Kuo-Ming Wu, Zhubei, TW;

Hau-Yi Hsiao, Chiayi, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/822 (2006.01); H01L 21/304 (2006.01); H01L 29/06 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/8221 (2013.01); H01L 21/304 (2013.01); H01L 27/0688 (2013.01); H01L 29/0657 (2013.01);
Abstract

The present disclosure, in some embodiments, relates to a multi-dimensional integrated chip structure. The multi-dimensional integrated chip structure includes a first substrate having a first upper surface and a second upper surface above the first upper surface. A first outermost perimeter of the first upper surface is larger than a second outermost perimeter of the second upper surface. A second substrate is over the first substrate. The second substrate has a third upper surface above the second upper surface. A third outermost perimeter of the third upper surface is smaller than the second outermost perimeter of the second upper surface.


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