The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2022

Filed:

Dec. 24, 2019
Applicant:

Changxin Memory Technologies, Inc., Hefei, CN;

Inventors:

Kangling Ji, Hefei, CN;

Weibing Shang, Hefei, CN;

Hongwen Li, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01); G11C 11/408 (2006.01); G11C 11/403 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4087 (2013.01); G11C 11/403 (2013.01);
Abstract

A DRAM memory includes: a substrate; a plurality of memory banks arranged in rows and columns on the substrate, each memory bank is divided into three memory blocks in the column direction. Each memory block has a number of memory cells arranged in rows and columns. Dividing each memory bank into three memory blocks in the column direction shortens the length of the memory bank in the row direction, as each memory bank has a certain capacity, so a large drive is no longer required. In addition, the distance from the control circuit and the data transmission circuit to the corresponding memory cell in the memory array in each memory bank will be shorter too, reducing parasitic resistance and parasitic capacitance generated from the data transmission circuit. As a result, the data transmission rate and data transmission accuracy are improved. The overall power consumption is reduced.


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