The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 06, 2022
Filed:
Mar. 19, 2021
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Yi-Chen Lo, Hsinchu County, TW;
Jung-Hao Chang, Taichung, TW;
Li-Te Lin, Hsinchu, TW;
Pinyen Lin, Rochester, NY (US);
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/51 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/165 (2006.01); H01L 27/12 (2006.01); H01L 27/088 (2006.01); H01L 21/3065 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/67 (2006.01); H01J 37/00 (2006.01); H01L 21/8234 (2006.01); H01L 21/311 (2006.01); H01L 21/3213 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
H01L 29/517 (2013.01); H01J 37/00 (2013.01); H01L 21/0228 (2013.01); H01L 21/02274 (2013.01); H01L 21/28088 (2013.01); H01L 21/3065 (2013.01); H01L 21/31122 (2013.01); H01L 21/32136 (2013.01); H01L 21/67069 (2013.01); H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 29/42376 (2013.01); H01L 29/6681 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/785 (2013.01); H01L 21/845 (2013.01); H01L 27/1211 (2013.01); H01L 29/165 (2013.01); H01L 29/4966 (2013.01); H01L 29/7848 (2013.01);
Abstract
A method includes following steps. First and second gate electrodes are formed over a substrate, with an ILD layer between the first and second gate electrodes. A first etch operation is performed to etch the first and second gate electrodes. A sacrificial layer is formed across the etched first and second gate electrodes and the ILD layer. A second etch operation is performed to etch the sacrificial layer and the etched the first and second gate electrodes.