The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 2022

Filed:

May. 07, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Nikolay A. Mirin, Boise, ID (US);

Robert Dembi, Boise, ID (US);

Richard T. Housley, Boise, ID (US);

Xiaosong Zhang, Boise, ID (US);

Jonathan D. Harms, Meridian, ID (US);

Stephen J. Kramer, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/20 (2006.01); H01L 21/68 (2006.01); G01R 33/07 (2006.01); H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
G03F 7/70633 (2013.01); G01R 33/072 (2013.01); G03F 7/70683 (2013.01); H01L 21/68 (2013.01); H01L 23/544 (2013.01); H01L 2223/54426 (2013.01);
Abstract

A method of aligning a wafer for semiconductor fabrication processes may include applying a magnetic field to a wafer, detecting one or more residual magnetic fields from one or more alignment markers within the wafer, responsive to the detected one or more residual magnetic fields, determining locations of the one or more alignment markers. The marker locations may be determined relative to an ideal grid, followed by determining a geometrical transformation model for aligning the wafer, and aligning the wafer responsive to the geometrical transformation model. Related methods and systems are also disclosed.


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