The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2022
Filed:
Oct. 12, 2020
United Microelectronics Corp., Hsin-Chu, TW;
Chang-Po Hsiung, Hsinchu, TW;
Ching-Chung Yang, Hsinchu, TW;
Shan-Shi Huang, Hsinchu, TW;
Shin-Hung Li, Nantou County, TW;
Nien-Chung Li, Hsinchu, TW;
Wen-Fang Lee, Hsinchu, TW;
Chiu-Te Lee, Hsinchu County, TW;
Chih-Kai Hsu, Tainan, TW;
Chun-Ya Chiu, Tainan, TW;
Chin-Hung Chen, Tainan, TW;
Chia-Jung Hsu, Tainan, TW;
Ssu-I Fu, Kaohsiung, TW;
Yu-Hsiang Lin, New Taipei, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
A semiconductor device includes a semiconductor substrate, a recess, a first gate oxide layer, and a gate structure. The semiconductor substrate includes a first region and a second region adjacent to the first region. The recess is disposed in the first region of the semiconductor substrate, and an edge of the recess is located at an interface between the first region and the second region. At least a part of the first gate oxide layer is disposed in the recess. The first gate oxide layer includes a hump portion disposed adjacent to the edge of the recess, and a height of the hump portion is less than a depth of the recess. The gate structure is disposed on the first region and the second region of the semiconductor substrate, and the gate structure overlaps the hump portion of the first gate oxide layer in a vertical direction.