The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2022

Filed:

Apr. 07, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hsin-Yi Lee, Hsinchu, TW;

Ji-Cheng Chen, Hsinchu, TW;

Cheng-Lung Hung, Hsinchu, TW;

Weng Chang, Hsinchu, TW;

Chi On Chui, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0673 (2013.01); H01L 21/0245 (2013.01); H01L 21/0262 (2013.01); H01L 21/02178 (2013.01); H01L 21/02186 (2013.01); H01L 21/02458 (2013.01); H01L 29/0638 (2013.01); H01L 29/0676 (2013.01); H01L 29/42392 (2013.01); H01L 29/4925 (2013.01); H01L 29/4958 (2013.01); H01L 29/4966 (2013.01); H01L 29/4975 (2013.01);
Abstract

A semiconductor device including a barrier layer surrounding a work function metal layer and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a semiconductor substrate; a first channel region over the semiconductor substrate; a second channel region over the first channel region; gate dielectric layers surrounding the first channel region and the second channel region; work function metal layers surrounding the gate dielectric layers; and barrier layers surrounding the work function metal layers, a first barrier layer surrounding the first channel region being merged with a second barrier layer surrounding the second channel region.


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