The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2022
Filed:
Sep. 02, 2020
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Ming-Che Ku, Hsinchu, TW;
Harry-Hak-Lay Chuang, Zhubei, TW;
Hung Cho Wang, Taipei, TW;
Tsun Chung Tu, Tainan, TW;
Jiunyu Tsai, Hsinchu, TW;
Sheng-Huang Huang, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
The present disclosure relates to a method of forming an integrated chip. The method includes forming an ILD layer over a memory device over a substrate. A hard mask structure is formed over the ILD layer and a patterning structure is formed over the hard mask structure. The hard mask structure has sidewalls defining a first opening directly over the memory device and centered along a first line perpendicular to an upper surface of the substrate. The patterning structure has sidewalls defining a second opening directly over the memory device and centered along a second line parallel to the first line. The second line is laterally offset from the first line by a non-zero distance. The ILD layer is etched below an overlap of the first and second openings to define a top electrode via hole. The top electrode via hole is with a conductive material.