The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2022
Filed:
Dec. 15, 2020
Applicant:
Nepes Co., Ltd., Samseong-myeon, KR;
Inventors:
Jun Kyu Lee, Cheongju-si, KR;
Su Yun Kim, Cheongju-si, KR;
Dong Hoon Oh, Cheongju-si, KR;
Yong Tae Kwon, Cheongju-si, KR;
Ju Hyun Nam, Cheongju-si, KR;
Assignee:
NEPES CO., LTD., Samseong-myeon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 24/03 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 2224/024 (2013.01); H01L 2224/0239 (2013.01); H01L 2224/02311 (2013.01); H01L 2224/02377 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/03825 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05541 (2013.01); H01L 2224/05573 (2013.01); H01L 2224/05644 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/05655 (2013.01); H01L 2224/05664 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/13006 (2013.01); H01L 2224/13023 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/3511 (2013.01);
Abstract
A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a lower structure including a semiconductor chip having a chip terminal; an external connection terminal connecting the semiconductor chip to an external device; and an intermediate connection structure including an upper surface and a lower surface opposite to the upper surface, and positioned between the lower structure and the external connection terminal.