The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 2022

Filed:

Mar. 21, 2020
Applicant:

Stats Chippac Pte. Ltd., Singapore, SG;

Inventors:

Pandi Chelvam Marimuthu, Singapore, SG;

Andy Chang Bum Yong, Singapore, SG;

Aung Kyaw Oo, Singapore, SG;

Yaojian Lin, Jiangyin, CN;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 23/552 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 21/486 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/528 (2013.01); H01L 23/5225 (2013.01); H01L 23/5389 (2013.01); H01L 23/552 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 23/3128 (2013.01); H01L 23/49833 (2013.01); H01L 2221/68331 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68354 (2013.01); H01L 2221/68359 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/19 (2013.01); H01L 2224/24227 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/83 (2013.01); H01L 2224/83005 (2013.01); H01L 2224/92244 (2013.01); H01L 2224/94 (2013.01); H01L 2224/97 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/3025 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A first conductive layer is formed with an antenna over a first surface of the encapsulant. A second conductive layer is formed with a ground plane over a second surface of the encapsulant with the antenna located within a footprint of the ground plane. A conductive bump is formed on the ground plane. A third conductive layer is formed over the first surface of the encapsulant. A fourth conductive layer is formed over the second surface of the encapsulant. A conductive via is disposed adjacent to the semiconductor die prior to depositing the encapsulant. The antenna is coupled to the semiconductor die through the conductive via. The antenna is formed with the conductive via between the antenna and semiconductor die. A PCB unit is disposed in the encapsulant.


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