The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2022

Filed:

Jun. 28, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Andrew P. Collins, Chandler, AZ (US);

Jianyong Xie, Chandler, AZ (US);

Sujit Sharan, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2006.01); H01L 23/48 (2006.01); H01L 23/64 (2006.01); H01L 23/36 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 23/481 (2013.01); H01L 23/642 (2013.01); H01L 23/645 (2013.01);
Abstract

A package is disclosed. The package includes a base die. The base die includes voltage regulating circuitry and input and output (I/O) circuitry. The I/O circuitry surrounds the voltage regulating circuitry. The package also includes a top set of dies. The top set of dies includes a plurality of dies that include logic circuitry and a plurality of dies that include passive components. The plurality of dies that include passive components surround the plurality of dies that include logic circuitry. The plurality of dies that includes passive components is coupled to the logic circuitry and to the voltage regulating circuitry.


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