The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 30, 2022

Filed:

Oct. 01, 2018
Applicant:

Amkor Technology, Inc., Tempe, AZ (US);

Inventors:

Jae Yun Kim, Gyeonggi-do, KR;

Gi Tae Lim, Gyeonggi-do, KR;

Woon Kab Jung, Seoul, KR;

Ju Hoon Yoon, Gyeonggi-do, KR;

Dong Joo Park, Incheon, KR;

Byong Woo Cho, Seoul, KR;

Gyu Wan Han, Seoul, KR;

Ji Young Chung, Gyeonggi-do, KR;

Jin Seong Kim, Gyeonggi-do, KR;

Do Hyun Na, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 23/31 (2006.01); H01L 21/50 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49811 (2013.01); H01L 21/50 (2013.01); H01L 23/3128 (2013.01); H01L 23/49827 (2013.01); H01L 23/49833 (2013.01); H01L 23/5389 (2013.01); H01L 24/92 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 2224/131 (2013.01); H01L 2224/133 (2013.01); H01L 2224/1329 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/293 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/8321 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83203 (2013.01); H01L 2224/92225 (2013.01); H01L 2224/92242 (2013.01); H01L 2924/181 (2013.01); H01L 2924/18161 (2013.01);
Abstract

A method of manufacturing a semiconductor device having a semiconductor die within an extended substrate and a bottom substrate may include bonding a bottom surface of a semiconductor die to a top surface of a bottom substrate, forming an adhering member to a top surface of the semiconductor die, bonding an extended substrate to the semiconductor die and to the top surface of the bottom substrate utilizing the adhering member and a conductive bump on a bottom surface of the extended substrate and a conductive bump on the bottom substrate. The semiconductor die and the conductive bumps may be encapsulated utilizing a mold member. The conductive bump on the bottom surface of the extended substrate may be electrically connected to a terminal on the top surface of the extended substrate. The adhering member may include a laminate film, a non-conductive film adhesive, or a thermal hardening liquid adhesive.


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