The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2022
Filed:
Nov. 10, 2020
Applicant:
Powertech Technology Inc., Hukou Township, Hsinchu County, TW;
Inventors:
Shih-Chun Chen, Hsinchu, TW;
Sheng-Tou Tseng, Hsinchu, TW;
Kun-Chi Hsu, Hsinchu, TW;
Chin-Ta Wu, Hsinchu, TW;
Ying-Lin Chen, Hsinchu, TW;
Ting-Yeh Wu, Hsinchu, TW;
Assignee:
Powertech Technology Inc., Hukou Township, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 21/56 (2006.01); H01Q 1/22 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 21/56 (2013.01); H01L 23/31 (2013.01); H01L 23/5386 (2013.01); H01L 24/96 (2013.01); H01L 25/0655 (2013.01); H01Q 1/2283 (2013.01);
Abstract
A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.