The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 09, 2022
Filed:
Jun. 24, 2019
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Shu-Bin Hsu, Taichung, TW;
Ren-Guei Lin, Taichung, TW;
Feng-Inn Wu, Taichung, TW;
Sheng-Chen Wang, Taichung, TW;
Jung-Yu Li, Taichung, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B24B 37/26 (2012.01); B24B 57/02 (2006.01); B24B 49/10 (2006.01); B24B 49/00 (2012.01); B24B 49/16 (2006.01);
U.S. Cl.
CPC ...
B24B 37/26 (2013.01); B24B 49/00 (2013.01); B24B 49/10 (2013.01); B24B 49/16 (2013.01); B24B 57/02 (2013.01);
Abstract
A method includes supplying slurry onto a polishing pad. A wafer is held against the polishing pad with a first piezoelectric layer interposed between a pressure unit and the wafer. A first voltage generated by the first piezoelectric layer is detected. The wafer is pressed, using the pressure unit, against the polishing pad according to the detected first voltage generated by the first piezoelectric layer. The wafer is polished using the polishing pad.