The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2022

Filed:

Jun. 01, 2020
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chen-Hua Yu, Hsinchu, TW;

Chun-Hui Yu, Hsinchu County, TW;

Kuo-Chung Yee, Taoyuan, TW;

Liang-Ju Yen, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/18 (2006.01); H01L 23/31 (2006.01); H01L 25/00 (2006.01); H01L 23/538 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 25/18 (2013.01); H01L 23/3135 (2013.01); H01L 23/367 (2013.01); H01L 23/5383 (2013.01); H01L 25/50 (2013.01);
Abstract

One of semiconductor packages includes a substrate and a package structure. The package structure is bonded to the substrate and includes a first redistribution layer structure, a first logic die, a plurality of second logic dies, a first memory die, a first heat conduction block and a first encapsulant. The first logic die and the second logic dies are disposed over and electrically connected to the first redistribution layer structure. The first memory die is disposed over the first logic die and the second logic dies and electrically connected to first redistribution layer structure. The first heat conduction block is disposed over the first logic die and the second logic dies. The first encapsulant encapsulates the first memory die and the first heat conduction block.


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