The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 19, 2022
Filed:
Jun. 25, 2019
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Bok Eng Cheah, Bukit Gambir, MY;
Jackson Chung Peng Kong, Tanjung Tokong, MY;
Loke Yip Foo, Bayan Baru, MY;
Wai Ling Lee, Bayan Lepas, MY;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 25/16 (2006.01); H01L 25/00 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5381 (2013.01); H01L 21/4857 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 25/16 (2013.01); H01L 25/50 (2013.01); H01L 23/49816 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19105 (2013.01);
Abstract
A semiconductor device and associated methods are disclosed. In one example, dies are interconnected through a bridge in a substrate. A reference voltage stack extends over at least a portion of the interconnect bridge, and a passive component is coupled to the reference voltage stack. In one example, the passive component helps to reduce interference in the power supply to components in the semiconductor device, such as the dies and the interconnect bridge.