The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 21, 2022
Filed:
Jun. 15, 2020
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Tien-Shun Chang, New Taipei, TW;
Chun-Feng Nieh, Hsinchu, TW;
Huicheng Chang, Tainan, TW;
Yee-Chia Yeo, Hsinchu, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); G03F 1/38 (2012.01); H01L 21/265 (2006.01); H01L 21/8234 (2006.01); H01L 21/311 (2006.01); H01L 21/3115 (2006.01); H01L 29/66 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3088 (2013.01); G03F 1/38 (2013.01); H01L 21/26586 (2013.01); H01L 21/3086 (2013.01); H01L 21/31111 (2013.01); H01L 21/31155 (2013.01); H01L 21/823431 (2013.01); H01L 21/823468 (2013.01); H01L 29/6656 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 21/76816 (2013.01);
Abstract
A manufacturing method of a semiconductor device, comprises the following steps: providing a semiconductor substrate; forming a dummy insulation layer and a dummy electrode sequentially stacked on the semiconductor substrate; forming spacers on sidewalls of the dummy electrode; removing the dummy electrode to exposes inner sidewalls of the spacers; and performing an ion implantation process to the inner sidewalls of the spacers and the dummy insulation layer.