The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 31, 2022

Filed:

Aug. 10, 2018
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Lawrence Schloss, Palo Alto, CA (US);

Raashina Humayun, Los Altos, CA (US);

Sanjay Gopinath, Fremont, CA (US);

Juwen Gao, San Jose, CA (US);

Michal Danek, Cupertino, CA (US);

Kaihan Abidi Ashtiani, Cupertino, CA (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C23C 16/14 (2006.01); H01L 21/285 (2006.01); C23C 16/16 (2006.01); C23C 16/455 (2006.01); H01L 21/768 (2006.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01);
U.S. Cl.
CPC ...
H01L 21/28568 (2013.01); C23C 16/14 (2013.01); C23C 16/16 (2013.01); C23C 16/45553 (2013.01); H01L 21/76877 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

Disclosed are methods of depositing a transition metal such as tungsten on a semiconductor substrate. The method includes providing a gas mixture of diborane with a balance of hydrogen, where the hydrogen serves to stabilize the diborane in the gas mixture. The method further includes delivering the gas mixture to the semiconductor substrate to form a boron layer, where the boron layer serves as a reducing agent layer to convert a metal-containing precursor to metal, such as a tungsten-containing precursor to tungsten. In some implementations, the semiconductor substrate includes a vertical structure, such as a three-dimensional vertical NAND structure, with horizontal features or wordlines having openings in sidewalls of the vertical structure, where the boron layer may be conformally deposited in the horizontal features of the vertical structure.


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